A test suite to validate the microcode and my current software toolchain is now complete and has successfully passed. I wrote, assembled and simulated a set of simple test cases for each instruction I have in the instruction set to prove they all work as intended. The suite in total is several hundred lines of assembly code, grouped into the following test sets:
- register-to-register transfer instructions (MOV instructions)
- stack operations (PUSH and POP instructions)
- 16-bit memory loads (LD instructions)
- 8-bit memory loads
- routine calls (CALL and RET instructions)
- 16-bit memory stores (ST instructions)
- 8-bit memory stores
- 8/16-bit arithmetic operations (ADD, ADC, …)
- 8/16-bit arithmetic operations (SUB, SBC, …)
- bitwise operations (SHL, SHR, AND, OR, XOR, …)
- compare and branch instructions (CMP, JL, JG, …)
I am quite happy with the way it worked. Of course, I did not test all possible combinations and sequences of opcodes and their operands but what I managed to cover gives me enough confidence to move forward. I am sure the bugs I’ve found would be really difficult to track in hardware, so hunting them down now will save me a lot of nerves in the future. I was discovering them everywhere – in the microcode, microcode assembler, in the simulator and in machine language assembler. Fortunately, they were all simple coding mistakes and the test did not reveal any fundamental misconceptions which would require me to redesign any element. I haven’t yet tested faults and interrupts though, nor yet to be decided virtual memory subsystem that both are next on my TODO list.
The test suite, along with a refreshed software toolchain and the most recent microcode listing may be found in the downloads section.