Schematics and board layouts of BYTEC/16 rev. 2.0 2

I have finished schematics and board layouts for BYTEC/16 rev. 2.0, including the addition of a new MMU board. BYTEC/16 occupies now of 8 boards (previously 7) with MMU being the second from the bottom of the stack. Boards #0 through #4 have been modified and need to be sent to a fab house, while #5 through #7 got wider headers and some trace cleanup, but their older versions can still be reused in 2.0.

For the sake of documenting things, below is a board stack description of BYTEC/16 rev. 2.0. For comparison, see similar post for BYTEC/16 rev. 1.x here. Click on the board images to zoom and see more board detail.

Board # Image Modules
0 (bottom) cpu0_v2
  • Bus interface
  • Clock generation
  • Reset circuitry
1 cpu1_v2
  • Memory Management Unit
2 cpu2_v2
  • Microcode sequencer
  • Instruction register (IR)
3 cpu3_v2
  • Microcode ROM
  • Field decoders
4 cpu4_v2
  • Machine Status Word (MSW)
  • ALU flags
5 cpu5_v2
  • Arithmetic Logic Unit (ALU)
  • Shifter
6 cpu6_v2
  • Registers (MDR, DP, A, X, Y)
7 (top) cpu7_v2
  • Registers (MAR, PC, KSP, SP)

I have designed also a new memory card, as the old one (which contained a rudimentary bank switching system) obviously could not be used with the new CPU anymore. As anticipated, the new board consists only of simple chip selection logic and the actual memories, so I was able to cram 128kB of ROM and 4MB of RAM in one 100×160 mm board. I have actually made this board layout some time ago already and had it made by PCBWay to check their quality. Six days after order placement a DHL courier was at my door with the delivery.

pcbway

PCBWay are incredibly cheap ($34 for 5 euro-card size boards) but you need to be prepared to accept quality inferior to what you would expect from other fab houses. People who used them reported drill hits to be slightly off (yet still acceptable) and silkscreen layer to be way off, sometimes be a few millimeters. My test run with PCBWay confirmed both problems (note especially bypass caps in the photo), yet I think I will use them also for my five redesigned PCBs of the CPU. Having them made for half the price that Seeed asks really makes the difference, considering also that it is the first build of BYTEC 2.0 and boards may still have some layout mistakes or design bugs.

I am sharing the updated schematics, Eagle files and gerbers in downloads page today. Since there are changes to microcode, I am publishing also a new microcode source code and a compatible microcode assembler. The latter had to be updated to drop support for an obsolete PPC register and to add a new FRET keyword, as described in my last post.

Save for any unexpected bugs (which may result in revisions 2.0.x) this completes the design of BYTEC/16 rev. 2.0. Stay tuned for new updates and bring-up reports soon.

2 thoughts on “Schematics and board layouts of BYTEC/16 rev. 2.0

  1. Reply James Nov 1,2016 11:41 pm

    Really love your posts, very informative and interesting to read. What a fantastic project!

  2. Reply Dear May 11,2017 11:01 am

    I know the good quality of wellpcb.
    Have seen many comments about pcbway.
    But did not have the order.

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