BYTEC/16 Memory Map
When in user mode, BYTEC/16 presents 64kB of code and 64kB of general purpose data memory to the programmer, fully addressable in read/write mode in range 0x0000-0xFFFF. A programmable MMU translates 16-bit logical addresses to a 22-bit physical bus (4kB pages). With the MMU disabled, logical addresses are passed through.
In supervisor data space the following cells have special use (CPU rev. 2.0 / 2.1). See the MMU post for page-table flags (PRESENT, WRITABLE, IO).
| Range | Description | R/W |
| $0000-$001F | interrupt / fault vector | R/W |
| $0020-$005F | fault page register (logical page, CODE/DATA, SUPER/USER) | R |
| $0080-$009F | page table: 16 supervisor code entries (2 bytes each) | R/W |
| $00A0-$00BF | page table: 16 supervisor data entries | R/W |
| $00C0-$00DF | page table: 16 user code entries | R/W |
| $00E0-$00FF | page table: 16 user data entries | R/W |
| $0100-$0FFF | kernel / stack area | R/W |
| $1000-$1FFF | I/O devices page (conventional mapping; relocatable via MMU IO flag) | |
| $1000-$100F | UART0 registers | varies (see here) |
| $1010-$101F | UART1 registers | varies (see here) |
| $1020-$102F | RTC registers | varies (see here) |
| $1030-$103F | IDE interface registers | varies (see here) |
| $1040-$104F | IDE scratch registers | varies (see here) |
| $2000-$FFFF | general purpose RAM | R/W |
BYTEC/16 IRQ Assignment
| Channel | Device |
| IRQ0 (highest priority) | unused |
| IRQ1 | unused |
| IRQ2 | UART0 |
| IRQ3 | UART1 |
| IRQ4 | IDE |
| IRQ5 | unused |
| IRQ6 | unused |
| IRQ7 (lowest priority) | RTC |