Toolchain update 2

Last time I mentioned that LCC port required updates to the instruction set. Indeed, I decided to give up some instructions in favour of those which seemed to make more sense in view of code generation. I did a major ISA cleanup:

• I have removed register indirect with register offset addressing modes like in LD A, (X:Y) as the same thing may be easily achieved by incrementing a base register – which may be now any of A, X or Y.
• I have removed multiple oddities like DP indirect with 8-bit offset, which were almost useless.
• I have kept 8-bit offsets only for SP-relative operations, primarily for fast access to locals and formal parameters of functions.
• I have used vacated opcodes to add more orthogonality to the instruction set – most importantly ADD and SUB operations (which are very common in code generated from C) may now use A, X or Y as left (target) operand. Previously, only A was possible.
• I have added a few instructions which were obvious omissions, with unsigned comparisons opening the list.

All in all, the CPU is now much happier, and so is my LCC compiler.

Today, I am publishing the complete toolchain in downloads page – new microcode (version 1.4), instruction set spreadsheet, and the assembler. I am posting also revised LCC patches, with important bug-fixes and updates from the last few days’ compilation testing sessions.