I have been unable to spend much time on the project lately, so there is no important milestone to report today. Still, some time ago I soldered the new memory board, implementing the banked model described in this post, and extending the original idea. It worked at the very first attempt, so I have no electrical engineering, board design or soldering lesson learned to share. Here is the new board:
Overall, I am glad that the computer is taking shape physically. What’s still missing is obviously a stack of core CPU PCBs. I am reluctant to build them because of the PCB manufacturing cost, which for the 6 planned euro-boards of the CPU will cost me some bucks (not really that few). Also, I am restraining myself from completing the hardware on PCBs and enclosing it in a case until I have a C compiler up and running, and a certain level of confidence that there will be no more changes to the CPU (resulting, for example, from necessary ISA rework).
As I declared several times before, I am going to be focusing now on software part of the project. Slowly but consistently I am going through the LCC book and working on small parts of a new LCC target definition for my CPU. The book itself is not really light reading, even for a person with some experience in writing lexical analyzers, parsers and/or code generators. Also, it is getting more and more obvious to me as I go through the text that there will be changes to the instruction set (to generate more compact code from C). For example, I may want to add instructions to support block copy to support passing
struct arguments to functions and their return values, which may be not so easy to achieve with the as-is hardware. Also, a magnitude of load and store instructions with 16-bit offsets to the stack pointer (SP) seem to me obsolete at this point, as such references will be a rare occurrence.
Stay tuned for updates. I should be posting a first revision of machine description for LCC’s